1. Field of the Invention
This invention relates to a photomicrography process using a non-optical exposure apparatus, and more particularly to a stencil mask using a mask for exposure in a lithography process using a non-optical exposure apparatus.
2. Description of the Related Art
Non-optical exposure apparatus using an electron beam, ion beam or X-ray or the like as a light source has a superior resolution compared to the conventional optical exposure apparatus using G-line or I-line as a light source. According to this, the lithography process using the non-optical exposure apparatus makes it possible to form fine patterns of below critical dimension which cannot be obtained by the prior lithography using the conventional optical exposure apparatus. The lithography process using the non-optical exposure apparatus is typically utilized in fabricating a mask for exposure as well as in fabricating non-memory devices such as a logic device or an ASICs.
A stencil mask as a mask for exposure is used in the lithography process using the non-optical exposure apparatus. The stencil mask is a general term for a mask used in the non-optical lithography using an ion beam, X-ray, or electron beam as a light source and includes a cell projection mask and a projection electron-beam lithography mask.
FIG. 1A is a sectional view of a cell projection mask in the prior art. A cell projection mask 10a includes a frame 1 for supporting means, a membrane 2a formed over the frame 1, for making a stress due to electron beam to maintain balance and an absorber 3a formed over the membrane 2a, for aborbing or scattering an electron beam. The cell projection mask 10a is fabricated by processing an SOI wafer where an oxide layer is sandwiched between silicon layers. The absorber 3a is made of a single material and the light absorbing in the absorber 3a is varied with the density and atomic weight of the material of the absorber. The absorber 3a is typically comprised of a silicon layer and the thickness of the silicon layer is determined in accordance with the acceleration voltage of electron. If the absorber is comprised of a silicon layer and the acceleration voltage of electron is 50 keV, it is known that the scattering depth of electron, that is the penetration depth of electron being scattering in the silicon layer, is 12 .mu.m. Accordingly, the thickness of the silicon layer for the absorber should be maintained at 20 .mu.m thicker than the penetration depth of 12 .mu.m so as to prevent the electron beam from penetrating the silicon layer for the absorber.
FIG. 1B is a sectional view of a projection electron-beam lithography mask in the prior art. A projection electron beam lithography mask 10b includes a membrane 2b and a scatterer 3b. The scatterer 3b is comprised of a single material, for example a silicon layer, like the absorber in the cell projection mask. The scattering angle of the electrons in the scatterer 3b is determined in accordance with the original characteristic of the material for the scatterer 3b.
However, the cell projection mask and the projection electron beam lithography mask have disadvantages as follows. FIG. 2A and FIG. 2B are diagrams illustrating phenomenon generated in the silicon layers for the absorber and the scatterer, respectively, in case where the silicon layers for the absorber and the scatterer have the respective thickness of 20 .mu.m and 10 .mu.m and the acceleration voltage of the electrons incident to the silicon layers is 50 keV. The reference numeral 20a designates the silicon layer having a thickness of 20 .mu.m, 20b designates the silicon layer having a thickness of 10 .mu.m, 30a designates incident electrons, 30b designates the electrons reflected from the surface of the silicon layer, 30c designates the electrons scattered or absorbed in the silicon layer, 30d designates the electrons which are scattered to the side wall of the silicon layer to cause the interference with the electrons penetrated through apertures, and 30e designates the electrons penetrating the silicon layer, respectively.
Referring to FIG. 2A, in case where the thickness of the silicon layer is 20 .mu.m, if the electrons 30a are incident to the silicon layer 20a, the electrons of about 15% of the incident electrons 30a are reflected from the surface of the silicon layer 20a and the electrons 30c of the remaining 85% are scattered in the silicon layer 20a. Most electrons 30c scattered in the silicon layer 20a are absorbed in the silicon layer 20a. However, a portion of the electrons, that is the electrons 30d scattered to the side wall of the silicon layer 20a, is not absorbed in the silicon layer 20a and has an effect on the electrons which are actually participated in patterning. As a result, the contrast of the electron beam due to the interference becomes degraded and it cannot obtain the desired pattern having a vertical etching profile. Furthermore, in case where the thickness of the silicon layer is 20 .mu.m, it takes a long time to etch the silicon layer so that the time required in processing is increased and the stability of the exposure process is not assured. Accordingly, considering the process aspect, it should reduce the thickness of the silicon layer. However, if the silicon layer becomes thin, the amount of electrons penetrating the silicon layer for the absorber is increased, thereby degrading remarkably the resolution of the mask.
Referring to FIG. 2B, in case where the acceleration voltage of electrons is 50 KeV and the thickness of the silicon layer is thinner than the penetration depth of electrons, the electrons of 15% of the incident electrons 30a in the silicon layer 20b are reflected from the surface of the silicon layer 20b and the electrons of the remaining 85% are penetrated into the silicon layer 20b. Of the electrons of 85%, a portion of about 36% is completely absorbed in the silicon layer 20b and the remaining portion of about 49% penetrates the silicon layer 20b. Therefore, when the thickness of the silicon layer 20b is thinner than the penetration depth of the electrons, that is when the penetration depth of the electrons is 12 .mu.m and the thickness of the silicon layer 20b is 10 .mu.m, the amount of the electrons penetrating the silicon layer 20b is increased and hence make it difficult to obtain the desired pattern. Besides, because the electrons 30d scattered to the side wall of the silicon layer 20b cause the interface with the electrons which are actually participated in patterning, the form of electron beam penetrating the apertures is changed and it cannot obtain the desired pattern having a vertical etching profile.
On the other hand, the electrons penetrating through the absorber or the scatterer of the silicon layer transform the form of the electron beam made by the stencil mask and degrade the resolution and the contrast of the mask. So as to solve this, as shown in FIG. 1B, in the prior lithography system, an angular limiting aperture 15 for limiting the scattering angle is disposed below the projection electron beam lithography mask 10b. The angular limiting aperture 15 as shown in FIG. 3 includes a transmitting portion 15a which is disposed in the central portion thereof and a shielding portion 15b. The angular limiting aperture 15 shields the electrons scattered at a large angle through the shielding portion 15b to make the desired pattern to be obtained.
However, the electrons scattered at a small angle are transmitted through the transmitting portion 15a as usual and they have an effect on the pattern and make it difficult to obtain the desired pattern.